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 Post subject: Bcc.s timing
PostPosted: Thu Apr 12, 2012 9:45 pm 
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Joined: Mon Dec 27, 2004 11:40 pm
Posts: 318
As far as I can see short branches that aren't taken should only take 8 cycles and not the 12 cycles that Sim68K seems to think they should.

Lee.


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 Post subject:
PostPosted: Fri Apr 13, 2012 12:12 am 
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Joined: Mon Jul 26, 2010 11:43 pm
Posts: 198
Location: Aurora, IL
BYTE displacement Not Taken 12, Taken 18
WORD displacement Not Taken 20, Taken 18

At least 68000UM 6th Edition

Edit: 68008 clocks


Last edited by clive on Fri Apr 13, 2012 1:14 am, edited 1 time in total.

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 Post subject:
PostPosted: Fri Apr 13, 2012 12:23 am 
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Posts: 318
Hmmmm. I'm getting my counts from table 8-9 in section 8.8 of the MC68000UM, ninth edition. Page 123 in the pdf I have. I'm probably forgetting to add the address mode count.

Whatever they should be they're not what Sim68K thinks they are.


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PostPosted: Fri Apr 13, 2012 12:53 am 
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Joined: Mon Jul 26, 2010 11:43 pm
Posts: 198
Location: Aurora, IL
I'm digging through some other emulators and the're all over the map.

Cyclone thinks Taken is 10, BYTE Not Taken 8, WORD Not Taken 12

StarScream has all BYTE at 8, WORD at 12

EASy68K logic appears to match Cyclone
Code:
  if (check_condition (condition))
    inc_cyc (10);
  else
    inc_cyc ((inst & 0xff != 0) ? 8 : 12);


Ok my big numbers were from the 68008 table.


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 Post subject:
PostPosted: Fri Apr 13, 2012 4:30 pm 
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Joined: Thu Dec 16, 2004 6:42 pm
Posts: 1044
Interesting bug. The author's logic was sound. He was just missing a parenthesis. Corrected in Sim68K v5.12.3

_________________
Prof. Kelly


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